| rdf:type | <https://jpsearch.go.jp/term/type/図書> |
| rdfs:label | "Design of High Voltage XDSL Line Drivers in Standard CMOS" |
| schema:name | "Design of High Voltage XDSL Line Drivers in Standard CMOS" @en |
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| schema:creator 2 | <https://jpsearch.go.jp/entity/ncname/Steyaert,_Michiel> (➜ "Steyaert, Michiel") |
| schema:creator | <https://jpsearch.go.jp/entity/ncname/Serneels,_Bert> (➜ "Serneels, Bert") |
| schema:datePublished | "2010" |
| schema:description 4 | "分類: BIC:TJFC" |
| schema:description | "備考: This book fits in the quest for highly efficient fully integrated xDSL modems for central office applications. It presents a summary of research at one of Europe's most famous analog design research groups over a five year period. The book focuses on the line driver, the most demanding building block of the xDSL modem for lowering power. The book covers the total design flow of monolithic CMOS high voltage circuits. It is essential reading for analog design engineers. (Nielsen Book)...(more)" |
| schema:description | "資料種別: Paperback / softback" |
| schema:description | "責任表示: By (author) Serneels, Bert; By (author) Steyaert, Michiel" |
| schema:edition | "1st ed. Softcover of orig. ed. 2008" |
| schema:encodingFormat | <https://ld.webcatplus.jp/ext/code/onix#BC> |
| schema:inLanguage | <http://id.loc.gov/vocabulary/iso639-2/eng> (➜ "英語") |
| schema:isbn | "9789048177288" |
| schema:numberOfPages | "200p" |
| schema:publisher | <https://ld.webcatplus.jp/entity/P60739> |
| schema:size | "H234 x W156" |
| schema:spatial | <https://jpsearch.go.jp/entity/place/オランダ> |
| schema:temporal | <https://jpsearch.go.jp/entity/time/2010> (➜ "2010年") |
| schema:tocEntry | "Preface. List of Abbreviations and Symbols. 1. Introduction. 1.1 Motivation of the Work. 1.2 Organisation of the Book. 2. Digital Subscriber Line. 2.1 DSL in a Nutshell. 2.2 The Channel. 2.3 Modulation Techniques. 2.4 Solutions for xDSL Line Drivers. 2.5 Conclusions. 3. The SOPA xDSL Line Driver. 3.1 The Describing Function Analysis Method. 3.2 Behavior Model of the SOPA. 3.3 High Voltage SOPA Amplifiers. 3.4 Conclusions. 4. High Voltage Design Considerations. 4.1 CMOS Scaling. 4.2 Stacking Devices. 4.3 Conclusions. 5. High Voltage Implementations in Standard CMOS. 5.1 A 7.5 V Output Driver in a 2.5 V 0.25 um CMOS Technology. 5.2 A 5.5 V Output Driver in a 1.2 V 130 nm CMOS Technology. 5.3 Conclustions. 6. High Voltage Line Driver Realisations. 6.1 A zeroth Order SOPA in 130 nm CMOS. 6.2 A First Order SOPA in 130 nm CMOS. 6.3 Conclusions. 7. Conclusions. 7.1 Main Contributions and Achievements. References. Index....(more)" |